# SIMDRegister: Add native double support for ARM Neon since aarch64 supports it

**URL:** <https://forum.juce.com/t/simdregister-add-native-double-support-for-arm-neon-since-aarch64-supports-it/49613>\
**Category:** Feature Requests\
**Created:** [January 11, 2022, 9:54am UTC](https://forum.juce.com/t/simdregister-add-native-double-support-for-arm-neon-since-aarch64-supports-it/49613 "2022-01-11T09:54:21Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![PluginPenguin](https://sea2.discourse-cdn.com/flex026/user_avatar/forum.juce.com/pluginpenguin/32/10203_2.png) [@PluginPenguin](https://forum.juce.com/u/PluginPenguin)\
**Post date:** [January 11, 2022, 9:54am UTC](https://forum.juce.com/t/simdregister-add-native-double-support-for-arm-neon-since-aarch64-supports-it/49613/1 "2022-01-11T09:54:22Z")

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I just wanted implement some custom SIMD stuff directly using ARM Neon intrinsics on a `juce::dsp::SIMDRegister<double>` and was surprised to find out that the internal `vSIMDType` is not `float64x2_t` as I would expect but a struct of two plain doubles.

> <https://github.com/juce-framework/JUCE/blob/9055820a30770479e30994c9a91029474cf60f7d/modules/juce_dsp/native/juce_neon_SIMDNativeOps.h#L458>

The comment says that it is not available, which is only true for aarch32. With nowadays M1 Macs and mobile targets, I think it would be a good think if the actually available instructions could be used when building for modern ARM CPUs. Could you add that and only keep the workaround if targeting old 32 Bit ARMs?